Recovery of transmitted power in an installation for transmission of high-voltage direct current

ABSTRACT

An installation for transmission of high-voltage direct current comprises a converter (SR1) which is controlled by a control unit (CU1). The control unit comprises a quotient-forming member, which forms a current order (IO) for the current (Id) in the dc connection of the installation in dependence on the quotient between a power order (PO) and a calculating value (UDF) of the direct voltage (Ud) at the converter, and a low-pass filter with a bandwidth (1/T1, 1/T2) capable of being controlled, which forms the calculating value as a filtered measured value (UD) of the direct voltage. The control unit comprises a signal-forming member which forms a state signal (FC), indicating that a short-circuit fault has occurred. The state signal influences the bandwidth of the low-pass filter such that the bandwidth is temporarily changed from a smaller value (1/T1) to a larger value (1/T2).

TECHNICAL FIELD

The present invention relates to a method for recovery of transmittedpower in an installation for transmission of high-voltage direct currentafter a transient short circuit-type fault on the dc connection of theinstallation or in ac networks connected to the installation, and to adevice for carrying out the method.

The device comprises a signal-forming member for forming a state signal,indicating that a short circuit-type fault has occurred.

BACKGROUND OF THE INVENTION

An installation for transmission of high-voltage current between two acnetworks usually comprises two converters, each one on its ac side beingconnected to a respective one of the ac networks, as well as a dcconnection which connects the direct-current terminals of one of theconverters to the corresponding direct-voltage terminals on the otherconverter. The dc connection may be in the form of an overhead lineand/or a cable and may also, in part, consist of ground or water insteadof a metallic conductor. In certain cases, the converters are erected inthe immediate vicinity of each other, so-called back-to-back erection,in which case the dc connection may consist of short busbars. Duringnormal operation, one of the converters, hereinafter referred to as therectifier, operates in rectifier operation, and the other converter,hereinafter referred to as the inverter, operates in inverter operation.The inverter is usually controlled to a maximum direct voltage suitablefor the operating conditions of the installation, whereas the rectifieris then controlled in such a way that the direct current and hence thetransmitted active power remain at a desired value. For this purpose, acurrent regulator is activated in the control system of the rectifier,which current regulator, in dependence on a comparison between a currentorder and a measured value of the actual direct current, controls thevoltage of the rectifier such that the difference between ordered andactual current approaches zero. The current order is generated in acalculating member as the quotient between a power order supplied tothis member and a measured value of the direct voltage at the rectifier.The measured direct voltage contains a certain measure of harmonics andalso other noise and therefore it is filtered in a filter of low-passcharacter before its value is supplied to the above-mentionedcalculating member. For a first-order filter with a transfer functioncorresponding to a single time constant, the time constant may typicallybe of the order of magnitude of one second.

Both the ac networks and the dc connection are subjected to shortcircuit-type faults or to single- or multi-phase ground faults. Thesefaults lead to the voltage of the installation breaking down or at leastsignificantly dropping, whereby the dc voltage of the converters isreduced to a voltage which essentially is zero. This also results in areduction of the transmitted power to essentially zero. Theabove-mentioned faults are often of a rapidly changing nature, typicallyof a duration of the order of magnitude of <0.5 seconds, and it isdesired and also often specifically required by the installationoperator to be able to rapidly return the installation to the operatingcondition it had before the occurrence of the fault. It is a knownproblem, however, that the time it takes to recover the power in thiskind of installations depends at the level of the direct current on theoccurrence of the fault in such a way that lower current levels entaillonger times for recovery of the power. This problem is furtheraccentuated when the dc connection comprises long cables which possess ahigh capacitance.

SUMMARY OF THE INVENTION

The invention aims to provide a method of the kind described in theintroductory part of the description, which permits a considerablyshorter time for recovery of power in the installation, and a device forcarrying out the method.

What characterizes a method and a device according to the invention willbecome clear from the appended claims.

Advantageous improvements of the invention will become clear from thefollowing description and the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be explained in greater detail by description ofembodiments with reference to the accompanying drawings, wherein

FIG. 1 schematically shows an installation for transmission ofhigh-voltage direct current,

FIG. 2 shows in the form of a block diagram parts of a control system ofa known embodiment for a rectifier included in an installation accordingto FIG. 1,

FIG. 3 shows in the form of a block diagram the formation of currentorders in a control system according to FIG. 2 in one embodiment of theinvention,

FIG. 4a shows in the form of a block diagram the formation of a statesignal for indicating a fault condition in one embodiment of theinvention,

FIG. 4b shows in the form of a block diagram the formation of a statesignal for indicating a fault condition in another embodiment of theinvention, and

FIG. 5 shows in the form of a block diagram an embodiment for theformation of a lower limit value for the value of the direct voltagewhen forming current orders according to FIG. 3.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The following description relates to the method as well as the device.Further, it is assumed, to simplify the presentation, that powers,voltages and currents, as well as their measured values and signalscorresponding to these measured values, are expressed, in a knownmanner, in per unit.

FIG. 1 shows an installation for transmission of high-voltage directcurrent comprising a converter SR1, connected on the ac side to athree-phase ac network N1 (only roughly indicated), a converter SR2,connected on the ac side to a three-phase ac network N2 (only roughlyindicated), and a dc connection L1, L2. The dc connection connects thedirect-voltage terminals of the converter SR1 to the correspondingdirect-voltage terminals on the converter SR2. The impedances of the dcconnection are marked by Z1, Z2, respectively, and comprise capacitances(not shown in the figure) between the conductors L1, L2 and/or betweenthe conductors L1, L2 and ground. For the description of the embodimentit is assumed that the converter SR1 is a rectifier and is thuscontrolled in order to attain the desired transmitted active power forthe installation, whereas the converter SR2 is an inverter. However,both converters are adapted in a known manner to operate both asrectifiers and as inverters. Each converter is equipped with a controlunit CU1, CU2, respectively, which generate control pulses CP1, CP2,respectively, for the valves of the converters. These are connected toeach other in a known manner via a telecommunication link TL for two-waytransmission of information about the operating parameters of theconverters. At the rectifier SR1, the direct voltage Ud and the directcurrent Id are measured with a voltage-measuring device VMU and acurrent-measuring device IMU, respectively. The measuring devices formmeasured values UD and ID, respectively, of voltage and current, whichmeasured values are supplied to the control unit CU1.

FIG. 2 shows a known manner, of those parts of the control unit CU1which concern the control of transmitted active power and comprise afirst part CU11 for forming a current order IO and a second part CU12for forming the control pulses CP1 in dependence on the current order.The measured value UD of the voltage Ud is supplied to anabsolute-value-forming member 1, which forms the absolute value of themeasured value of the voltage. The absolute value is supplied to alimiting member 2, the output signal of which is proportional to theabsolute value when this is above a lower limit value UDMINL and belowan upper limit value UDMAXL, but which cannot be below or above theserespective limit values. Both limit values may be influenced uponthrough signals SMAXL and SMINL, respectively, supplied to the limitingmember. The output signal from the limiting member is supplied to alow-pass filter 3. A low-pass filter may generally be characterized byits bandwidth, by which is meant the maximum frequency at which itsdamping of an applied signal does not exceed its damping of an appliedsignal with the frequency zero by more than a predetermined value. Thelow-pass filter 3 in this embodiment is a first-order filtercharacterized by a time constant T and its damping amounts to 3 dB atthe angular frequency ω=1/T and increases further at higher frequencies.The bandwidth of the low-pass filter is thus in this case inverselyproportional to the time constant T and is characterized by the value1/T. The time constant T may be influenced through a signal ST which issupplied to the low-pass filter and is typically of the order ofmagnitude of 1 second.

The low-pass filter forms as output signal a calculating value UDF ofthe direct voltage Ud, which calculating value is supplied to aquotient-forming member 4. The quotient-forming member is also suppliedwith a power order PO for ordered transmitted active power in theinstallation and forms as output signal a current order IO as thequotient between the power order PO and the calculating value UDF.

The current order is supplied to a synchronization member 5, in whichthe current orders for the two converters are synchronized via thetelecommunication link TL, and thereafter to a limiting member 6 forlimiting the current order in dependence on the measured value UD of thedirect voltage Ud, supplied to the limiting member mentioned. The outputsignal from the limiting member 6 is then supplied to a currentregulator 7 as a reference value therefor. In dependence on thedifference between the reference value and a measured value ID of thedirect current Id, supplied to the current regulator, the currentregulator generates a control signal which is supplied to acontrol-pulse-generating member 8, the output signal of whichconstitutes control pulses CP1 for the valves of the converter.

FIG. 3 shows an embodiment of the first part CU11 of the control unitCU1 for forming a current order IO according to the invention. Themembers described with reference to FIG. 2 are marked with correspondingreference numerals in FIG. 3. The embodiment of the low-pass filter 3deviates from that shown in FIG. 2 in that its time constant T, by meansof switching of a selector 9, can be caused to adopt two values T1 andT2 different from each other. The value T1 is a value chosen duringnormal undisturbed operation, and as mentioned above T1 is typically ofthe order of magnitude of 1 second. The value T2, which is chosen afterthe occurrence of a fault of the above-mentioned kind and for at leastpart of the time for recovery of the power in the installation, istypically of the order of magnitude of 0.1 second. The selector iscontrolled by a logic signal FC' which, when FC'="1", causes the timeconstant of the filter to adopt the value T2 and which, when FC'="0",causes its time constant to adopt the value T1. The signal FC' is formedin dependence on a state signal FC, generated by a signal-forming member11. Absence of the state signal FC, that is, when its value="0",indicates that the installation is in normal undisturbed operation, andpresence of the state signal FC, that is when its value="1", indicatesthat a fault of the above-mentioned kind has occurred. When the statesignal FC changes from "0" to "1", the corresponding change of thesignal FC' is delayed by a time t1 in a delay member 10. The delay t1 istypically of the order of magnitude of 0.01 second.

FIG. 4A shows an embodiment of the signal-forming member 11 for formingthe state signal FC. The measured value UD of the direct voltage Ud issupplied to a first comparator 12 and a second comparator 13 as well asto a first-order low-pass filter 14 with a time constant of the order ofmagnitude of 30 seconds. The output signal UC from the low-pass filter14 is multiplied in a first multiplier 15 by a constant K1<1 to form afirst comparison value UC1, which is supplied to the first comparator12, and in a second multiplier 16 by a constant K2, where K1<K2<1, toform a second comparison value UC2, which is supplied to the secondcomparator 13. The first comparator 12 forms a set signal SS="1" whenthe instantaneous measured value UD of the direct voltage is lower thanthe comparison value UC1 and the second comparator forms a reset signalRS="1" when the instantaneous measured value UD of the direct voltageexceeds the comparison value UC2. It may be advantageous to design thecomparators such that, as indicated in the figure, they exhibithysteresis around the value zero of the sum of the input signals,whereby the set and reset signals, respectively, are formed when theinstantaneous value of the measured value UD exceeds the comparisonvalues by a value corresponding to half the hysteresis.

The value of the constant K1 may typically be, for example, 0.76 and thevalue of the constant K2 typically, for example, 0.8. The hysteresis maythen typically be of the order of magnitude of 0.01.

The set signal SS is supplied to the set input S of a bistable flip-flop17 and to an inverting input of a logic AND circuit 18, the outputsignal of which is supplied to the reset input R of the bistableflip-flop. During normal and undisturbed operation of the installation,the measured value UD of the direct voltage assumes a value of around 1per unit, since the inverter normally is controlled to a maximum directvoltage suitable for the operating conditions of the installation. Underthese conditions, therefore, the signal SS="0" and the signal RS="1",and therefore the signal LUD1 of the Q-output of the bistable flip-flopassumes the value "0".

When a fault of the above-mentioned kind occurs, the direct voltage isbrought very rapidly, within the course of some ten or twenty msec, tozero by the control units of the converters, SS then assuming the value"1", RS assuming the value "0", and LUD1 assuming the value "1". Whenthe voltage and its measured value, while recovering the power whenreturning to the normal operating condition, exceed the comparison valueUC1, the signal SS returns to the value "0". The signal RS returns tothe value "1" when the measured value of the voltage, while returningthe installation to the normal operating condition, exceeds thecomparison value UC1, the signal LUD1 thus returning to the value "0".Under the considered conditions, with transient faults which disappearwithin the course of typically the order of magnitude of <0.5 seconds,the voltage recovery takes place within a space of time considerablyshorter than the time constant of the low-pass filter 14, and thereforethe comparison values UC1 and UC2 only change to an insignificant extentduring the fault and recovery period.

The signal LUD1 is supplied to a logic OR circuit 32, the output signalof which may pass through a gate circuit 19 provided that a signal DBL,indicating that the rectifier is in unblocked state, that is, thatfiring pulses to the controllable semiconductor elements in theconverter are not blocked, is present. The output signal from the gatecircuit is supplied to a delay circuit 20, which delays transitions inthe input signal from "0" to "1" by a time t4 and transitions from "1"to "0" by a time t5. It is advantageous here to choose t4 of the orderof magnitude 0.02 seconds and t5 of the order of magnitude 0.5 seconds.The output signal FC of the delay circuit 20 constitutes a state signalwhich, by assuming the value "0", indicates a normal operating conditionas far as the direct voltage is concerned and, by assuming the value"1", indicates that the direct voltage is abnormally low or that therectifier is not unblocked.

FIG. 4B shows a comparator 21 which compares the measured value UD ofthe direct voltage with a chosen comparison value UC3 and, if UD<UC3,forms a signal LUD2. UC3 may advantageously be chosen to be of the orderof magnitude of 0.73 per unit. The signal LUD2 may, for example, besupplied to a second input of the OR circuit 32 in FIG. 4A, as indicatedin this figure, and thus be utilized as a safety measure when indicatinga low voltage. Alternatively, only one of the signals LUD1 and LUD2 maybe utilized in order to form the state signal FC in the manner shown,for example, in FIG. 4A. In this case, of course, the OR circuit 32 maybe omitted.

By changing the bandwidth of the low-pass filter 3 from a smaller valueto a larger value, which takes place in dependence on the signal FC',which in turn is formed in dependence on the state signal FC, theadvantage is thus achieved that the calculating value UDF of the directvoltage Ud is adapted more rapidly to the instantaneous value of thedirect voltage at the states which are indicated by the signal FC'having the value "1" In this way, when calculating the current order, afaster adaptation to the actual operating parameters of the installationis achieved than if, because of a smaller bandwidth in the low-passfilter, a calculating value UDF with a time lag in relation to theinstantaneous direct voltage would be used for calculating the currentorder.

Thus, after the occurrence of the fault and during recovery of thepower, the calculating value UDF will first drop by the time constantT2, instead of by the time constant T1, towards a lower limit valueUDMINL, limited by the lower limit value set in the limiting member 2,and then, still by the time constant T2, follow the recovery of thevoltage to the value it had before the occurrence of the fault. When thesignal LUD1 and/or the signal LUD2 again assume the value "0", thesignal FC assumes the value "0", causing the selector 9 to change itsposition such that the low-pass filter 3 will again be characterized bythe time constant T1. The return of the signal FC to the value "1" isthus delayed relative to the return of the signal LUD1 and/or the signalLUD2 by the time t5 in the delay member 20, which is chosen such that itis ensured that the calculating value UDF has had time to substantiallyassume the measured value UD.

The faster adaptation of the filtered calculating value UDF to theinstantaneous value of the direct voltage means that the current orderduring the course of events in question will assume a larger value thanthat it would have assumed during the corresponding period if the timeconstant of the low-pass filter 3 had remained at its higher value.

In an advantageous embodiment of the invention, the maximum value of thecurrent order is adapted by making the lower limit value UDMINL in thelimiting member 2, on the occurrence of the fault and during therecovery period, dependent on the actual value of the actual currentorder on the occurrence of the fault.

FIG. 5 shows an embodiment of a limit value-forming member 22 forachieving the above-mentioned dependence. By means of a selector 23,controlled by the state signal FC, the signal SMINL may be caused toassume a predetermined value UML when the state signal FC assumes thevalue "0" and a value UML', calculated in dependence on the actualcurrent order IO and the actual calculating value UDF, when the signalFC assumes the value "1". In a summator 24 the difference between 1 perunit and the current order IO is formed, and this difference is suppliedto a summator 26 after multiplication by a chosen constant K3 in amultiplier 25. A selector 27 forms as output signal the smaller of thevalue 1 per unit and the output signal from the summator 26. The outputsignal of the selector 27 is supplied to a multiplier 28 formultiplication by the calculating value UDF, delayed by a time t2 in adelay circuit 29. The time t2, which is of the order of magnitude of 15ms, is so chosen that the calculating value UDF, at least for the firstpart of the recovery period, practically maintains the value it hadbefore the occurrence of the fault. The output signal UML" from themultiplier 28 is supplied to a selector 30 controlled by the statesignal FC such that, when FC="0", the signal UML', which is supplied tothe selector 30, is equal to the signal UML". When the state signal FCassumes the value "1", the signal SMINL assumes the value UML'=UML". Atthe same time, through the switchover of the selector 30, a holdingcircuit is formed, comprising a delay circuit 31 such that the signalUML' maintains the value UML" it had when the state signal assumed thevalue "1" whereas the state signal FC remains "1". When FC again assumesthe value "0", the two selectors 23 and 30 switch over, such that thelower limit value UDMINL in the limiting member 2 resumes the value UMLwhereas the value UML' is continuously updated in dependence on theactual current order and the actual calculating value UDF.

An arithmetical example further illustrates the function of the device.Assume that during stationary operation the power order PO=0.1 and thedirect voltage Ud=1.0 and that this state has continued so long thatalso the calculating value UDF=1.0. This gives the current orderIO=PO/UDF=0.1. Assume further that the constant K3 is chosen to be 0.6.The input signal to the selector 27 from the summator 26 becomes1-(1-0.1)*0.6!=0.46<1. The signal UML'=UML" therefore assumes the value0.46*1=0.46. This value is usually higher than the value UML used duringnormal and stationary operation. When a fault occurs, the measured valueUD will rapidly approach zero and the state signal FC will assume thevalue "1", whereby SMINL=UML'=0.46. At the same time, a switchover ofthe time constant of the low-pass filter 3 to the value T2 is made, andtherefore the calculating value UDF determined by this time constantdrops towards its lower limit value 0.46. Provided that the power orderremains at the value PO=0.1, the current order IO, determined by thetime constant T2, will increase towards a value 0.1/0.46=0.22. Thisentails an increase of about 120% compared with the value IO=0.1 which,determined by the time constant T1, would have remained for aconsiderably longer time, with the numerical examples stated above inreality during the whole recovery process. In those cases where the dcconnection comprises a cable and its impedance is essentially determinedby the capacitance of the cable, the doubling of the current order andhence the current, exemplified above, entails a halving of the chargingtime of the cable. When the calculating value UDF during the return tothe preceding operating condition increases above the value 0.46, thecurrent order will decrease towards the earlier value 0.1.

In the event that the fault had occurred at a power order of, forexample, PO=0.3, the input signal to the selector 27 from the summator26, and hence the signal UML', would have assumed the value1-(1-0.3)*0.6!=0.58 and during a fault condition the current order wouldhave increased towards a value IO=0.3/0.58=0.51, an increase by about70% compared with the value IO=0.3.

At higher power orders before the occurrence of the fault, thevoltage-dependent current limit arranged in the limiting member 6 mayintervene and limit the current order during at least the beginning ofthe recovery time. With the invention, however, the current order mayalways be caused to assume a maximum value during the recovery period,taking into consideration the dimensioning of the installation in otherrespects.

The invention is not limited to the embodiments shown, but a pluralityof modifications are feasible within the scope of the inventive concept.The low-pass filter 3 has been exemplified with a single time constantT1, T2, respectively, but, of course, within the scope of the inventiveconcept the corresponding advantages can also be obtained in case oflow-pass filters of a higher order.

A reduction of the time constant T for the low-pass filter 3 exemplifiedabove from the value T1 to the value T2 from 1 second to 0.1 second thuscorresponds to an increase of its bandwidth by a factor 10, and in moregeneral terms, in those cases where the low-pass filter 3 ischaracterized by a general transfer function with a predeterminedbandwidth, an increase of this bandwidth during a fault condition andduring the recovery period is within the scope of the inventive concept.

The value T1 of the time constant of the low-pass filter is typically ofthe order of magnitude of 1 second, but may in certain cases be as lowas about 0.3 seconds. It has been found to be advantageous to select thevalue T2 to be about 0.05 to 0.1 seconds, which thus entails an increaseof the bandwidth of the filter by at least a factor 3.

The formation of the lower limit value UDMINL of the limiting value UDFand the formation of the state signal FC may, of course, also within thescope of the inventive concept be made in other ways.

The calculating members, the filters, the comparators, etc., included inthe device, may be implemented, wholly or partially, as hard-wired,analogically or digitally operating circuits, or in microprocessorsprogrammed for the specific purpose.

We claim:
 1. A device for recovery of transmitted power in aninstallation for transmission of high-voltage direct current after atransitory short-circuit fault on the dc connection (L1,L2) of theinstallation or in ac networks (N1,N2) connected to the installation, inwhich installation a converter (SR1) is controlled by means of a controlunit (CU1), comprising a quotient-forming member, which forms a currentorder (IO) for the current (Id) in the dc connection in dependence onthe quotient between a power order (PO) and a calculating value (UDF) ofthe direct voltage (Ud) at the converter, a low-pass filter which formsthe calculating value as a filtered measured value (UD) of the directvoltage, said low-pass filter having a bandwidth (1/T1, 1/T2) capable ofbeing influenced, wherein the control unit comprises a signal-formingmember which forms a state signal (FC), indicating that a short-circuitfault has occurred, said state signal influencing the bandwidth of thelow-pass filter such that the bandwidth is temporarily changed from asmaller value (1/T1) to a larger value (1/T2).
 2. A device according toclaim 1, wherein the control unit comprises a limiting value-formingmember (22) to form, in dependence on the state signal, a lower limitvalue (UDMINL) for the calculating value (UDF) as a value (UML') formedin dependence on the current order.
 3. A device according to claim 2,wherein the lower limit value formed by the limiting value-formingmember increases with increasing current order.
 4. A device according toclaim 1, wherein the bandwidth is changed from the smaller value to thelarger value after the formation of the state signal, and the bandwidthis changed from the larger value to the smaller value after thedisappearance of the state signal.
 5. A device according to claim 1,wherein the larger value of the bandwidth of the low-pass filter is atleast 3 times larger than the smaller value of its bandwidth.
 6. Adevice according to claim 1, wherein the low-pass filter is of the firstorder with a bandwidth characterized by a filter time constant (T1,T2),wherein the bandwidth of the low-pass filter is changed by changing thefilter time constant from a larger value (T1) to a lower value (T2). 7.A device according to claim 1, wherein the signal-forming membercomprises at least one comparator to compare the measured value (UD) ofthe direct voltage with at least one comparison value (UC3), whereby thestate signal is formed after the measured value of the direct voltagehas fallen below the comparison value and disappears after the measuredvalue of the direct voltage has risen above the comparison value.
 8. Adevice according to claim 7, wherein the signal-forming member comprisesat least two comparators to compare the measured value (UD) of thedirect voltage with a first comparison value (UC1) and a secondcomparison value (UC2), respectively, whereby the state signal is formedafter the measured value of the direct voltage has fallen below thefirst comparison value and disappears after the measured value of thedirect voltage has risen above the comparison value.
 9. A method forrecovery of transmitted power in an installation for transmission ofhigh-voltage direct current after a transitory short-circuit fault onthe dc connection (L1,L2) of the installation or in ac networks (N1,N2)connected to the installation, in which installation a converter (SR1)is controlled in such a way that a current order (IO) for the current(Id) in the dc connection is formed in dependence on the quotientbetween a power order (PO) and a calculating value (UDF) of the directvoltage (Ud) at the converter, the calculating value being formed independence on a measured value (UD) of the direct voltage, said measuredvalue being filtered in a low-pass filter with a bandwidth (1/TI,1/T2)capable of being influenced, wherein a state signal (FC) is formed,indicating that a short-circuit fault has occurred, and, in dependenceon said state signal, the bandwidth of the low-pass filter istemporarily changed from a smaller value (1/T1) to a larger value(1/T2).
 10. A method according to claim 9, wherein the calculating value(UDF) is limited to a lower limit value (UDMINL), which in dependence onthe state signal is caused to assume a value (UML') formed in dependenceon the current order.
 11. A method according to claim 10, wherein thelower limit value is caused to assume a value which increases withincreasing current order.
 12. A method according to claim 9, wherein thebandwidth is changed from the smaller value to the larger value afterthe formation of the state signal and the bandwidth is changed from thelarger value to the smaller value after the disappearance of the statesignal.
 13. A method according to claim 9, wherein the larger value ofthe bandwidth is at least three times larger than the smaller valuethereof.
 14. A method according to claim 9, wherein the low-pass filteris of the first order with a bandwidth characterized by a filter timeconstant (T1, T2), wherein the bandwidth is changed by changing thefilter time constant from a larger value (T1) to a lower value (T2). 15.A method according to claim 9, wherein the state signal is formed afterthe measured value of the direct voltage has fallen below a firstpredetermined comparison value (UC1) and disappears after the measuredvalue of the direct voltage has risen above a second predeterminedcomparison value (UC2).
 16. A method according to claim 15, wherein thefirst and second predetermined comparison values are identical.